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(parent: df99215) | patch
vmx: Fix bug in VMX VPMU fixed function PMC offset
authorKeir Fraser <keir.fraser@citrix.com>
Mon, 21 Jun 2010 08:59:10 +0000 (09:59 +0100)
committerKeir Fraser <keir.fraser@citrix.com>
Mon, 21 Jun 2010 08:59:10 +0000 (09:59 +0100)
commit154a413090645bac5ba4587999484e41088f3f89
tree30a0a88fec8e3f64b58f29c3d358068b5ea261c6tree | snapshot
parentdf992155c8557babc598fc5e73be6554426233c2commit | diff
vmx: Fix bug in VMX VPMU fixed function PMC offset

This is a minor fix to the calculation of bit-width of fixed function
perfmon counters in Intel processors.  Bits 5-12 of edx register
should be calculated as (edx & 0x1fe0) >>5 instead of using 0x1f70.

From: "John, Jaiber J" <jaiber.j.john@intel.com>
Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
xen/arch/x86/hvm/vmx/vpmu_core2.c diff | blob | history
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